1. Field of the Invention
The present invention relates to a method for manufacturing a silicon single crystal which is capable of yielding a high quality silicon single crystal having desired crystal characteristics by accurately controlling the diameter of a silicon single crystal when pulling upward the silicon single crystal from a silicon melt using the Czochralski method.
Priority is claimed on Japanese Patent Application No. 2009-005002, filed Jan. 13, 2009, the content of which is incorporated herein by reference.
2. Description of Related Art
Conventionally, various methods have been available for manufacturing silicon single crystals, and the Czochralski method (hereafter, simply referred to as the “CZ method”) being the most representative among them. In the CZ method of growing a silicon single crystal, polysilicon is melted in a crucible to form a silicon melt. Subsequently, a seed crystal is dipped into the silicon melt, and the seed crystal is then pulled upward at a predetermined rotational speed and a predetermined pulling rate, thereby growing a cylindrical silicon single crystal below the seed crystal.
In this process of pulling a silicon single crystal upward, it is necessary to maintain a positional relationship between a heater for heating the crucible and the level of the silicon melt surface so that the amount of heat received by the silicon melt is maintained at a constant level. For this reason, the position at which a crucible is held is moved upward by a vertically moving apparatus, thereby keeping the level of the silicon melt surface, which goes down as the silicon single crystal is pulled upward, at the same position (i.e., the same height) with respect to that of the heater.
FIG. 6 is a diagram for explaining a state of defect distribution in the cross section of a silicon single crystal which is grown while gradually lowering the pulling rate in the step for pulling the silicon single crystal. As shown in FIG. 6, ring-like oxidation induced stacking faults (R-OSFs) appear on the longitudinal section of a silicon single crystal which is grown while gradually lowering the pulling rate. Different types of grown-in defects are observed following the crystal growth in a crystal region in which the silicon single crystal is pulled at a higher rate than that for the OSF-generating region where R-OSFs appear, and a crystal region in which the silicon single crystal is pulled upward at a lower rate than that for the OSF-generating region. The crystal region, which is formed at higher pulling rates than the pulling rate at which the R-OSFs develop, is formed as an infrared scattering defect generating region in which void defects (vacancy type defects) also known as crystal originated particles (COPs) or flow pattern defects (FPDs) are detected.
In addition, in a crystal region which is formed at lower pulling rates than that for forming the OSF-generating region and is located adjacent to the OSF-generating region, an oxygen precipitation promoting region (PV region) in which oxygen precipitates (i.e., bulk micro defects: BMDs) can be formed is present. In a crystal region which is formed at even lower pulling rates than that for forming the oxygen precipitation promoting region, an oxygen precipitation inhibiting region (PI region) in which no oxygen precipitates are formed is present. Both the oxygen precipitation promoting region (PV region) and the oxygen precipitation inhibiting region (PI region) are formed as defect-free regions which are regions having extremely few grown-in defects (i.e., a region sandwiched between the dotted lines A and B in FIG. 6). Moreover, in a crystal region which is formed at even lower pulling rates than that for forming this defect-free region, a dislocation cluster generating region is present, in which the aggregation of interstitial Si involving dislocation is formed so that interstitial Si defects (dislocation cluster defects) are detected.
Void defects within the silicon single crystal may act as a factor for deteriorating the gate oxide integrity at an early stage of the wafer production. Moreover, the interstitial Si defects within the silicon single crystal also deteriorate the device characteristics. Accordingly, for the sake of quality characteristics of silicon single crystals, growth of crystals within a defect-free region is desired.
The extent of these grown-in defects introduced is thought to be determined based on the V/G (mm2/° C.·min) value; i.e., a ratio between the pulling rate V (mm/min) when growing a silicon single crystal and the crystallization temperature gradient G (° C./mm) in the vicinity of solid-liquid interface in the pull axis direction. That is, by growing a silicon single crystal while controlling the V/G value at a constant level of a predetermined value, it becomes possible to manufacture a silicon single crystal having a desired defect state or a desired defect-free region.
In general, the V/G value is controlled by adjusting the pulling rate V. Moreover, when controlling the V/G value, it has been known that the crystallization temperature gradient G at the time of pulling silicon single crystal is greatly affected by the distance (spacing) between the melt surface of the silicon melt and a heat shielding member disposed so as to oppose the melt surface. In order to control the V/G value with high accuracy so as to attain a desired defect-free region, it is required to keep this distance between the melt surface and the heat shielding member at a constant level. However, as the pulling of silicon single crystal proceeds, the amount of silicon melt decreases and the level of the melt surface declines. Therefore, the level of the crucible needs to be raised.
Conventionally, the volume of silicon melt decreased in accordance with the pulling of a silicon single crystal is first calculated, and the degree of increase in the level of a crucible is then calculated based on the decreased volume of silicon melt and the inner diameter of the crucible. However, it is difficult to accurately calculate the decreased amount of silicon melt due to the change in crucible dimensions in accordance with the deformation of a crucible that is heated to high temperatures, the errors in measuring the inner diameter of the crucible, or the like, and thus the level position of the silicon melt surface with respect to that of the heater cannot be maintained at a constant level. For this reason, in order to manufacture a silicon single crystal having a desired defect region by controlling the V/G value, it is necessary to accurately measure the level position of the silicon melt surface while pulling the silicon single crystal, and to accurately control the degree of increase in the crucible level based on this measured value.
As a method for accurately measuring the level position of the silicon melt surface, for example, a method is known in which a laser beam is made to enter at a predetermined angle with respect to the silicon melt and the laser beam reflected at the silicon melt surface is then detected by a detection apparatus. However, the level of silicon melt surface is constantly swaying due to the influence of convection or the like, and thus it has been difficult to accurately measure the level position of the silicon melt surface. For this reason, for example, in Japanese Unexamined Patent Application, First Publication No. Hei 11-147786, a slit is provided in the plane of incidence in a laser beam detector, thereby removing the noise generated due to the swaying of the silicon melt surface.